1. Technical Field
The present invention relates generally to the field of computer systems, and in particular to methods and mechanisms for accessing a coherence storage during debug operation.
2. Description of the Related Art
A computer system often includes multiple input/output (I/O) devices and a processor sharing one or more memory devices via a memory controller. Many different agents may generate memory transactions and convey these memory transactions to the memory controller. Often, a coherence unit may be used to maintain the ordering and coherence of these memory transactions within the system.
In some systems that include such a coherency unit, a storage within the coherency unit may store coherence information associated with cache tags of one or more cache memories within the computer system. Because of the complex nature of updating the coherence information across all agents in the system, it may be desirable to provide debug access to the storage in the coherency unit while the system continues to operate. In many systems, debug logic includes separate datapaths and access mechanisms to whatever logic block needs to be accessed. However such debug mechanisms may consume additional die area, and may cause some loss of performance, which may be unacceptable. This may be especially true in highly integrated systems such as a system on chip (SoC) designs.